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asahi kasei [ ak 5380 ] ms0100-e-01 2001/7 - 1 - general description the ak 5380 is a stereo a/d converter with wide sampling rate of 4khz ~ 96khz and is suitable for high- end audio system. the AK5380 achieves high accuracy and low cost by using enhanced dual bit d s techniques. the AK5380 requires no external components because the analog inputs are single-ended. the audio interface has two formats (msb justified, i 2 s) and can correspond to many systems like music instrument and av receiver. f eatures o stereo d s adc o on-chip digital anti-alias filtering o single-ended input o digital hpf for dc-offset cancel o s/(n+d): 96db@5v for 48khz o dr: 106db@5v for 48khz o s/n: 106db@5v for 48khz o sampling rate ranging from 4khz to 96khz o master clock: 256fs/384fs/512fs/768fs ( ~ 48khz) 256fs/384fs ( ~ 96khz) o input level: ttl/cmos selectable o output format: 24bit msb justified / i 2 s selectable o power supply: 4.5 ~ 5.5v (va) 2.7 ~ 5.5v (vd at 48khz) 4.5 ~ 5.5v (vd at 96khz) o ta=-40 ~ 85 c o small 16pin tssop package o ak5353 pin-compatible d s modulator mclk ainl lrck sclk sdto dif vcom clock divider ainr agnd va decimation filter serial i/o interface voltage reference ttl dgnd vd tst d s modulator decimation filter pdn 96khz 24bit d s adc with single ? ended input ak5 380
asahi kasei [ ak 5380 ] ms0100-e-01 2001/7 - 2 - n ordering guide AK5380vt -40 ~ +85 c 16pin tssop akd5380 evaluation board n pin layout 1 ainr ainl vcom nc agnd va vd dgnd top view 2 3 4 5 6 7 8 tst ttl pdn dif sclk mclk lrck sdto 16 15 14 13 12 11 10 9 n the difference with ak5353 ak5353 AK5380 s/(n+d) 84db 96db dr,s/n 96db 106db va(analog supply) 2.7 to 5.5v 4.5 to 5.5v input resistance 60k w (@48khz) 15k w (@48khz) pin #3 vref pin nc pin
asahi kasei [ ak 5380 ] ms0100-e-01 2001/7 - 3 - p in /f unction no. pin name i/o description 1 ainr i rch analog input pin 2 ainl i lch analog input pin 3 nc - nc pin no internal bonding. 4 vcom o common voltage output pin normally connected to agnd with a 0.1 m f ceramic capacitor in parallel with an electrolytic capacitor less than 2.2 m f. 5 agnd - analog ground pin, 0v 6 va - analog power supply pin, +4.5 ~ +5.5v 7 vd - digital p ower s upply pin, +2.7 ~ +5.5v(fs=48khz), +4.5 ~ +5.5v(fs=96khz) 8 dgnd - digital ground pin, 0v 9 sdto o serial data output pin data bits are presented msb first, in 2 ? s complement format. this pin is ? l ? in the power-down mode. 10 lrck i left/right channel select pin the fs clock is input to this pin. 11 mclk i master clock input pin 12 sclk i serial data input pin output data is clocked out on the falling edge of sclk. 13 pdn i power-down pin when ? l ? , the circuit is in power-down mode. the AK5380 should always be reset upon power-up. 14 d if i serial interface format pin ? l ? : msb justified, ? h ? : i 2 s 15 ttl i digital input level select pin ? l ? : cmos level (vd=2.7 ~ 5.5v), ? h ? : ttl level (vd=4.5 ~ 5.5v) 16 tst i test pin (internal pull-down pin) this pin should be left open. note: all input pins except pull-down pins should not be left floating.
asahi kasei [ ak 5380 ] ms0100-e-01 2001/7 - 4 - a bsolute maximum ratings (agnd, dgnd =0v ; note 1 ) parameter symbol min max units power supplies analog (va pin) digital (vd pin) |agnd-dgnd| va vd d gnd -0.3 -0.3 - 6.0 6.0 0.3 v v v input current (any pins except for supplies) iin - 10 ma analog input voltage (ainl, ainr pins) vina -0.3 va+0.3 v digital input voltage vind -0.3 vd+0.3 v ambient temperature ta - 4 0 85 c storage temperature tstg -65 150 c note s: 1 . all voltages with respect to ground . 2 . agnd and dgnd must be connected to the same analog ground plane . warning : operation at or beyond these limits may results in permanent damage to the device. normal operation is not guaranteed at these extremes. recommended operating conditions ( agnd, dgnd=0v ; note 1 ) parameter symbol min typ max units power supplies (note 3 ) analog digital (fs=4khz to 48khz) digital (fs=4khz to 96khz) va vd vd 4.5 2.7 4.5 5.0 5.0 5.0 5.5 va va v v v note s: 1 . all voltages with respect to ground . 3 . the power up sequence between va and vd is not critical. *akm assumes no responsibility for the usage beyond the conditions in this datasheet.
asahi kasei [ ak 5380 ] ms0100-e-01 2001/7 - 5 - analog characteristics ( ta=25 c ; v a, v d = 5 v ; fs=4 8k hz ; i/f format=mode 0; signal frequency =1khz ; measurement band width=20hz ~ 20khz; bw=40hz ~ 40khz at fs=96khz; unless otherwise specified) parameter min typ max units adc analog input characteristics : resolution 24 bits s/(n+d) (-1dbfs) (note 4 ) fs=48khz fs=96khz 88 82 96 90 d b db dr (-60dbfs) (note 5 ) fs=48khz, a-weighted fs=96khz 100 94 106 102 d b db s/n fs=48khz, a-weighted fs=96khz 100 94 106 102 d b db inter c hannel isolation 90 110 db dc accuracy inter c hannel gain mismatch 0.1 0. 5 db gain drift 100 150 ppm/ c input voltage (note 6 ) fs=48khz 2.8 3.0 3.2 vpp fs=96khz 3.0 3.2 3.4 vpp input resistance (note 7 ) 10 15 k w power supply rejection (note 8 ) - 50 db power supplies power supply current (va+vd) normal operation ( pdn = ? h ? , fs=48khz) (note 9 ) normal operation ( pdn = ? h ? , fs=96khz) (note 9 ) power-down mode ( pdn = ? l ? ) 24 30 10 36 45 100 ma ma m a notes: 4 . the ratio of the rms value of the signal to the rms sum of all the spectral components less than 20khz bandwidth, including distortion components. 5 . s/(n+d) which is measured with an input signal of - 60db below full-scale. 6 . this value is the full scale(0db) of the input voltage. input voltage is proportional to va. (vin=0.6xva) 7 . 9k w (typ) and 6k w (min) at fs=96khz. 8 . psr is applied to va,vd with 1khz, 50mvpp. 9 . va=16ma(typ); vd=8ma(typ)@48khz&5v, 5ma(typ)@48khz&3v, 14ma(typ)@96khz&5v .
asahi kasei [ ak 5380 ] ms0100-e-01 2001/7 - 6 - filter characteristics (fs=48khz) ( ta= 25 c ; v a= 4.5 ~ 5.5 v ; v d= 2.7 ~ 5.5 v ; fs=4 8k hz ) parameter symbol min typ m ax units digital filter (decimation lpf) passband (note 10 ) -0.005 db -0.02db -0.06db -6.0db pb 0 - - - 21.768 22.0 24.0 21.5 - - - khz khz khz khz stopband (note 10 ) sb 26.5 khz stopband attenuation sa 80 db group delay distortion d gd 0 m s group delay (note 11 ) gd - 27.6 - 1/fs digital filter (hpf) frequency response: -3db -0.5db -0.1db fr - - - 1.0 2.9 6.5 - - - hz hz hz note s: 10 . the passband and stopband frequencies scale with fs. 11 . the calculating delay time which occurred by digital filtering. this time is from the input of analog signal to setting the 24bit data of both channels to the output register for adc. filter characteristics (fs=96khz) ( ta= 25 c ; v a= 4.5 ~ 5.5 v ; v d= 4.5 ~ 5.5 v ; fs= 96k hz ) parameter symbol min typ m ax units digital filter (decimation lpf) passband (note 10 ) -0.005 db -0.02db -0.06db -6.0db pb 0 - - - 43.536 44.0 48.0 43.0 - - - khz khz khz khz stopband (note 10 ) sb 53.0 khz stopband attenuation sa 80 db group delay distortion d gd 0 m s group delay (note 11 ) gd - 27.6 - 1/fs digital filter (hpf) frequency response: -3db -0.5db -0.1db fr - - - 2 5.8 13 - - - hz hz hz note s: 10 . the passband and stopband frequencies scale with fs. 11 . the calculating delay time which occurred by digital filtering. this time is from the input of analog signal to setting the 24bit data of both channels to the output register for adc.
asahi kasei [ ak 5380 ] ms0100-e-01 2001/7 - 7 - digital characteristics (cmos level input) ( ta= 25 c ; v a= 4.5 ~ 5.5 v ; v d= 2.7 ~ 5.5 v ; ttl = ? l ? ) parameter symbol min typ max units h igh-l evel input voltage low-l evel input voltage vih vil 0.7xvd - - - - 0.3xvd v v h igh-l evel output voltage ( iout= -1 00 m a ) low-l evel output voltage ( iout= 1 00 m a ) voh vol vd -0.5 - - - - 0.5 v v input leakage current (exc ept tst pin) iin - - 10 m a digital characteristics (ttl level input) ( ta= 25 c ; v a= 4.5 ~ 5.5 v ; v d= 4.5 ~ 5.5 v ; ttl = ? h ? ) parameter symbol min typ max units h igh-l evel input voltage (ttl pin) (all pins except ttl pin) low-l evel input voltage (ttl pin) (all pins except ttl pin) vih vih vil vil 0.7xvd 2.2 - - - - - - - - 0.3xvd 0.8 v v v v h igh-l evel output voltage ( iout= -1 00 m a ) low-l evel output voltage ( iout= 1 00 m a ) voh vol vd -0.5 - - - - 0.5 v v input leakage current (exc ept tst pin) iin - - 10 m a
asahi kasei [ ak 5380 ] ms0100-e-01 2001/7 - 8 - switching characteristics (fs=4khz ~ 48khz) ( ta= -40 ~ 85 c ; v a= 4.5 ~ 5.5 v ; v d= 2.7 ~ 5.5 v ; c l =2 0pf ) parameter symbol min t yp max units control clock frequency master clock 256fs: pulse width low pulse width high 384fs: pulse width low pulse width high 512fs: pulse width low pulse width high 768fs: pulse width low pulse width high sclk frequency lrck frequency fclk tclkl tclkh fclk tclkl tclkh fclk tclkl tclkh fclk tclkl tclkh fslk fs 1.024 32 32 1.536 21 21 2.048 16 16 3.072 11 11 4 12.288 18.432 24.576 36.864 6.144 48 mhz ns ns mhz ns ns mhz ns ns mhz ns ns mhz khz serial interface timing (note 12 ) sclk period sclk pulse width low pulse width high lrck edge to sclk ? - ? (note 13) sclk ? - ? to lrck edge (note 13) lrck edge to sdto valid (note 14) sclk ? ? to sdto valid tslk tslkl tslkh tlrsh tshlr tdlr tdss 160 65 65 30 30 35 35 ns ns ns ns ns ns ns power-down & reset timing pdn pulse width pdn ? - ? to sdto delay (note 15) tpdw tpdv 150 4129 n s 1/fs no te s: 12 . refer to the operating overview section ? serial data interface ? . 13 . sclk rising edge must not occur at the same time as lrck edge. 14 . in case of msb justified format. 15 . these cycles are the number of lrck rising from pdn rising .
asahi kasei [ ak 5380 ] ms0100-e-01 2001/7 - 9 - switching characteristics (fs=48khz ~ 96khz) ( ta= -40 ~ 85 c ; v a= 4.5 ~ 5.5 v ; v d= 4.5 ~ 5.5 v; c l =2 0pf ) parameter symbol min t yp max units control clock frequency master clock 256fs: pulse width low pulse width high 384fs: pulse width low pulse width high sclk frequency lrck frequency fclk tclkl tclkh fclk fclkl fclkh fslk fs 12.288 16 16 18.432 11 11 48 24.576 36.864 6.144 96 mhz ns ns mhz ns ns mhz khz serial interface timing (note 12 ) sclk period sclk pulse width low pulse width high lrck edge to sclk ? - ? (note 13) sclk ? - ? to lrck edge (note 13) lrck edge to sdto valid (note 14) sclk ? ? to sdto valid tslk tslkl tslkh tlrsh tshlr tdlr tdss 160 65 65 30 30 20 20 ns ns ns ns ns ns ns power-down & reset timing pdn pulse width pdn ? - ? to sdto delay (note 15) tpdw tpdv 150 4129 n s 1/fs no te s: 12 . refer to the operating overview section ? serial data interface ? . 13 . sclk rising edge must not occur at the same time as lrck edge. 14 . in case of msb justified format. 15 . these cycles are the number of lrck rising from pdn rising .
asahi kasei [ ak 5380 ] ms0100-e-01 2001/7 - 10 - n timing diagram 1/fclk tclkl vih tclkh mclk vil 1/fs vih lrck vil tslk tslkl vih tslkh sclk vil clock timing tshlr vih lrck vil tlrsh vih sclk vil tdlr sdto tdss 50%vd serial interface timing tpdw vil pdn tpwv sdto 50%vd vih power-down & reset timing
asahi kasei [ ak 5380 ] ms0100-e-01 2001/7 - 11 - operation overview n system clock input the external clocks which are required to operate the AK5380 are mclk(256fs/384fs/512fs/768fs), lrck(1fs), sclk. mclk should be synchronized with lr ck but the phase is not critical . when 384fs, 512fs or 768fs clock is input to mclk pin, the internal master clock becomes 256fs(=384fs x 2/3=512fs x 1/2=768fs x 1/3). table 1 illustrates standard audio word rates and corresponding frequencies used in the AK5380. all external clocks (mclk,bick,lrck) should always be present whenever the AK5380 is in normal operation mode ( pdn = ? h ? ). if these clocks are not provided, the AK5380 may draw excess current and may not possibly operate properly because the device utilizes dynamic refreshed logic internally. if the external clocks are not present, the AK5380 should be in the power-down mode ( pdn = ? l ? ). after exiting reset at power-up etc., the AK5380 is in the power-down mode until mclk and lrck are input. mclk sclk fs 256fs 384fs 512fs 768fs 64fs 128fs 32.0khz 8.1920mhz 12.2880mhz 16.3840mhz 24.576mhz 2.0480mhz 4.0960mhz 44.1khz 11.2896mhz 16.9344mhz 22.5792mhz 33.8688mhz 2.8224mhz 5.6448mhz 48.0khz 12.2880mhz 18.4320mhz 24.5760mhz 36.8640mhz 3.0720mhz 6.1440mhz 96.0khz 24.5760mhz 36.8640mhz n/a n/a 6.1440mhz n/a table 1 . example of system clock n serial data interface two kinds of data format can be selected by dif pin. the data is clocked out via the sdto pin by sclk corresponding to the setting of dif pin. the format of output data is 2 ? s complement msb first. mode dif format 0 0 24bit, msb justified, l/r, sclk 3 48fs (16bit, msb justified, l/r, sclk=32fs) 1 1 24bit, i2s, sclk 3 48fs (16bit, i2s, sclk=32fs) table 2 . audio serial interface formats
asahi kasei [ ak 5380 ] ms0100-e-01 2001/7 - 12 - sdto lch data sclk lrck 23 0 23:msb, 0:lsb 1 2 22 23 24 25 31 22 21 1 0 rch data 23 0 23:msb, 0:lsb 1 2 22 23 24 25 31 22 21 1 0 0 1 23 22 (64fs) figure 1 . mode 0 timing (sclk=64fs) sdto lch data sclk lrck 15 0 15:msb, 0:lsb 1 2 3 11 12 13 14 15 14 13 12 4 rch data 15 0 15:msb, 0:lsb 1 2 11 12 13 15 14 13 12 4 0 1 15 14 (32fs) 3 2 1 0 3 14 3 2 1 0 figure 2 . mode 0 timing (sclk=32fs) sdto lch data sclk lrck 0 0 23:msb, 0:lsb 1 2 22 23 24 25 31 23 22 2 1 rch data 0 0 23:msb, 0:lsb 1 2 22 23 24 25 31 23 22 2 1 0 1 23 (64fs) figure 3 . mode 1 timing (sclk=64fs) sdto lch data sclk lrck 4 0 15:msb, 0:lsb 1 2 3 4 12 13 14 15 15 14 13 12 rch data 4 0 15:msb, 0:lsb 1 2 4 12 13 15 15 14 13 12 0 1 15 (32fs) 0 3 2 1 0 3 14 3 2 1 0 figure 4 . mode 1 timing (sclk=32fs)
asahi kasei [ ak 5380 ] ms0100-e-01 2001/7 - 13 - n power down the AK5380 is placed in the power-down mode by bringing pdn ? l ? and the digital filter is also reset at the same time. this reset should always be done after power-up. in the power-down mode, the vcom are agnd level. an analog initialization cycle starts after exiting the power-down mode. therefore, the output data sdto becomes available after 4129 cycles of lrck clock. during initialization, the adc digital data outputs of both channels are forced to a 2 ? s complement ? 0 ? . the adc outputs settle in the data corresponding to the input signals after the end of initialization (settling approximately takes the group delay time). normal operation internal state pdn power-down initialize normal operation 4129/fs(86.021ms@fs=48khz) idle noise gd gd ? 0 ? data a/d in (analog) a/d out (digital) clock in mclk,lrck,sclk (1) (2) (3) ? 0 ? data idle noise notes: (1) digital output corresponding to analog input has the group delay (gd). (2) a/d output is ? 0 ? data at the power-down state. (3) when the external clocks (mclk,sclk,lrck) are stopped, the AK5380 should be in the power-down state. figure 5 . power-down/up sequence example n system reset the AK5380 should be reset once by bringing pdn ? l ? after power-up. the internal timing starts clocking by the rising edge (falling edge at mode1) of lrck after exiting from reset and power down state by mclk.
asahi kasei [ ak 5380 ] ms0100-e-01 2001/7 - 14 - system design figure 4 shows the system connection diagram. an evaluation board is available which demonstrates application circuits, the optimum layout, power supply arrangements and measurement results. ainr 1 10u ainl 2 nc 3 vcom 4 agnd 5 va 6 vd 7 dgnd 8 16 15 14 13 12 11 10 9 tst ttl dif pdn sclk mclk lrck sdto AK5380 top view 10u + + 0.1u 2.2u + + + 0.1u 10u 0.1u 10u rch in lch in analog 5v mode control controller system ground analog ground power-down control figure 6 . typical connection diagram note: the value of electrolytic capacitor at vcom depends on the low-frequency noise of power supply. analog ground digital ground system controller ainr 1 ainl 2 nc 3 vcom 4 agnd 5 va 6 vd 7 dgnd 8 16 15 14 13 12 11 10 9 tst ttl dif p d n sclk mclk lrck sdto AK5380 figure 7 . ground layout note: agnd and dgnd must be connected to the same analog ground plane.
asahi kasei [ ak 5380 ] ms0100-e-01 2001/7 - 15 - 1. grounding and power supply decoupling the AK5380 requires careful attention to power supply and grounding arrangements. va and vd are usually supplied from analog supply in system. alternatively if va and vd are supplied separately, the power up sequence is not critical. agnd and dgnd of the AK5380 must be connected to analog ground plane. system analog ground and digital ground should be connected together near to where the supplies are brought onto the printed circuit board. decoupling capacitors should be as near to the AK5380 as possible, with the small value ceramic capacitor being the nearest. 2. on-chip voltage reference the voltage input to va sets the analog input range. vcom are 50%va and normally connected to agnd with a 0.1 m f ceramic capacitor. an electrolytic capacitor 2.2 m f parallel with a 0.1 m f ceramic capacitor attached to vcom pin eliminates the effects of high frequency noise. no load current may be drawn from these pins. all signals, especially clocks, should be kept away from the vcom pin in order to avoid unwanted coupling into the AK5380. 3. analog inputs the adc inputs are single-ended and internally biased to the common voltage (50%va) with 15k w (typ)@fs=48khz resistance. the input signal range scales with the supply voltage and nominally 0.6xva vpp(typ)@fs=48khz. the adc output data format is 2 ? s complement. the dc offset is removed by the internal hpf. the AK5380 samples the analog inputs at 64fs. the digital filter rejects noise above the stop band except for multiples of 64fs. the AK5380 includes an anti-aliasing filter (rc filter) to attenuate a noise around 64fs.
asahi kasei [ ak 5380 ] ms0100-e-01 2001/7 - 16 - package 0.1 0.1 0 ~ 10 detail a seating plane 0.10 0.17 0. 0 5 0. 22 0.1 0.65 5.0 1.10max a 1 8 9 16 16 pin tssop (unit: mm) 4.4 6.4 0.2 0.5 0.2 n package & lead frame material package molding compound: epoxy lead frame material: cu lead frame surface treatment: solder plate
asahi kasei [ ak 5380 ] ms0100-e-01 2001/7 - 17 - marking akm 5380 v t xxyyy 1) pin #1 indication 2) date code : xx yyy ( 5 digits) xx: lot# yyy: date code 3) marketing code : 5380 vt 4) asahi kasei logo i m portant notice these products and their specifications are subject to change without notice. before considering any use or application, consult the asahi kasei microsystems co., ltd. (akm) sales office or authorized distributor concerning their current status. akm assumes no liability for infringement of any patent, intellectual property, or other right in the application or use of any information contained herein. any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. akm products are neither intended nor authorized for use as critical components in any safety, life support, or other hazard related device or system, and akm assumes no responsibility relating to any such use, except with the express written consent of the representative director of akm. as used here: (a) a hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. (b) a critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. it is the responsibility of the buyer or distributor of an akm product who distributes, disposes of, or otherwise places the product with a third party to notify that party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold akm harmless from any and all claims arising from the use of said product in the absence of such notification.

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